1. Technical Field
The present invention relates to transistor design and, and more particularly, to the design of fin field effect transistors having recessed source and drain regions.
2. Description of the Related Art
In conventional fin field effect transistors (FinFETs), source and drain regions are formed with a top surface that is flush with, or raised with respect to, a semiconductor fin. This leads to external resistance which degrades the performance of the FinFET. Furthermore, a flush or raised design frequently needs a high-energy implant process for doping. High-energy implants can damage and cause vacancies in the substrate, resulting a lower-than-optimal external resistance.